Placas
CODIGOS DE PLACAS
Tanto los códigos de placas como los códigos de html son útiles de saberlos, para
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CFh : Test CMOS R/W functionality.
C0h : Early chipset initialization:
- Disable shadow RAM
- Disable L2 cache (socket 7 or below)
- Program basic chipset registers
C1h : Detect memory
- Auto-detection of DRAM size, type and ECC.
- Auto-detection of L2 cache (socket 7 or below)
C3h : Expand compressed BIOS code to DRAM
C5h : Call chipset hook to copy BIOS back to E000 & F000 shadow RAM.
01h : Expand the Xgroup codes locating in physical address 1000:0
02h : Reserved
03h : Initial Superio_Early_Init switch.
04h : Reserved
05h : Blank out screen, Clear CMOS error flag
06h : Reserved
07h : Clear 8042 interface Initialize 8042 self-test
08h : Test special keyboard controller for Winbond 977 series Super I/O chips.
09h : Reserved
0Ah : Disable PS/2 mouse interface (optional).
0B-0Dh : Reserved
0Eh : Test F000h segment shadow to see whether it is R/W-able or not. If test fails,
keep beeping the speaker.
0Fh : Reserved
10h : Auto detect flash type to load appropriate flash R/W codes into the run time
area in.
F000 : for ESCD & DMI support.
11h : Reserved
12h : Use walking 1’s algorithm to check out interface in CMOS circuitry. Also set
real-time clock power status, and then check for override.
13h : Reserved
14h : Program chipset default values into chipset. Chipset default values are
MODBINable by OEM customers.
15h : Reserved
16h : Initial Early_Init_Onboard_Generator switch.
17h : Reserved
18h : Detect CPU information including brand, SMI type (Cyrix or Intel) and
CPU level (586 or686).
19-1Ah : Reserved
1Bh : Initial interrupts vector table. If no special specified, all H/W
interrupts are directed to SPURIOUS_INT_HDLR & S/W interrupts to URIOUS_soft_HDLR.
1Ch : Reserved
1Dh : Initial EARLY_PM_INIT switch.
1Eh : Reserved
1Fh : Load keyboard matrix (notebook platform)
20h : Reserved
21h : HPM initialization (notebook platform)
22h : Reserved
23h : Check validity of RTC value:e.g. a value of 5Ah is an invalid value for RTC minute.
24-26h : Reserved
27h : Initialize INT 09 buffer
28h : Reserved
29h : Program CPU internal MTRR (P6 & PII) for 0-640K memory address.
2A-2Ch : Reserved
2Dh : Initialize multi-language
2E-32h : Reserved
33h : Reset keyboard except Winbond 977 series Super I/O chips.
34-3Bh : Reserved
3Ch : Test 8254
3Dh : Reserved
3Eh : Test 8259 interrupt mask bits for channel 1.
3Fh : Reserved
40h : Test 8259 interrupt mask bits for channel 2.
41h : Reserved
42h : Reserved
43h : Test 8259 functionality.
44h : Reserved
45-46h : Reserved
47h : Initialize EISA slot
48h : Reserved
49h : Calculate total memory by testing the last double word of each 64K page.
4A-4Dh : Reserved
4Eh : Program MTRR of M1 CPU
4Fh : Reserved
50h : Initialize USB
51h : Reserved
52h : Test all memory (clear all extended memory to 0)
53-54h : Reserved
55h : Display number of processors (multi-processor platform)
56h : Reserved
57h : Display PnP logo
58h : Reserved
59h : Initialize the combined Trend Anti-Virus code.
5Ah : Reserved
5Bh : (Optional Feature) Show message for entering AWDFLASH.EXE from FDD (optional)
5Ch : Reserved
5Dh : Initialize Init_Onboard_Super_IO switch.
5E-5Fh : Reserved
60h : Okay to enter Setup utility; i.e. not until this POST stage can users enter
the CMOS setup utility.
61-64h : Reserved
65h : Initialize PS/2 Mouse
66h : Reserved
67h : Prepare memory size information for function call: INT 15h ax=E820h
68h : Reserved
69h : Turn on L2 cache
6Ah : Reserved
6Bh : Program chipset registers according to items described in Setup & Auto-configuration
table.
6Ch : Reserved
6Dh : Assign resources to all ISA PnP devices.
6Eh : Reserved
6Fh : Initialize floppy controller
70-72h : Reserved
73h : (Optional Feature) Enter AWDFLASH.EXE if
